Digital processing systems are constantly evolving toward smaller size, higher operating clock frequencies to improve performance, and lower operating voltages to limit power consumption. However, because power consumption is proportional to the square of the operating frequency and directly proportional to the operating voltage, the total power consumption of a given system tends to increase, or remain constant at best, as performance increases. Power consumption is the product of voltage and current, so as the voltage is reduced, the current required by these systems may increase. With miniaturization, the increase in current in a decreased form factor significantly increases the current density. Furthermore, because the processing systems are operating at higher frequencies and higher edge rates, the high frequency content of their transient current requirements is also increasing. For example, a digital signal with a 200 MHz fundamental frequency may require currents at the seventh harmonic (1.4 GHz), eighth harmonic (1.6 GHz) or higher, to support the associated edge rates.
In a conventional digital processing system, there are many signals that contribute to the high-frequency transient current requirements. For example, there may be signals that transition a device from a standby state to an active state, or vice versa. There may also be control signals or groups of control signals that perform discrete operations such as read or write operations. Typically, each operation (e.g., a read operation or a write operation) requires a combination of synchronous and/or asynchronous control signals in order to execute properly. For example, a memory write operation may require a clock signal, an address strobe signal, a data strobe signal, a chip enable signal and a write enable signal, each signal characterized by fast rising and falling edge transitions. Similarly, a memory read operation may require a clock signal, an address strobe signal, a chip enable signal and an output enable signal. Each of these high edge-rate signals is applied to one or more logic gates, which draw high-frequency transient currents in response to the high edge rates.
The transient currents are supplied by a power supply system, which typically includes a central power supply and a power distribution network. The high frequency performance of a power supply system is typically limited by the distribution network. As illustrated in FIG. 1A, a power distribution line can be viewed as a distributed inductor 15, between a power supply 10 and a peripheral device 20, that opposes transient current changes according to Lenz's law for inductors, V=L(di/dt), where V is a voltage opposing the current change, L is the distributed inductance of the power distribution line, and di/dt is the rate of change of current (i) with respect to time (t). If the frequency of the transient current load on the power supply increases, the rate of change of current increases, and the opposing voltage increases. At sufficiently high operating frequencies, as illustrated in FIG. 1B, the power distribution line may be viewed as a transmission line 16 with a characteristic impedance Z0 and a propagation delay Δt that prevents the power supply from responding in-phase with the transient current demands of the processing system. In either case, the transient current demand at the peripheral device 20 in the processing system may exceed the current-sourcing capability of the power supply system, generating voltage spikes which may cause the device to malfunction or which may couple to signal lines and impair signal integrity. In the latter case, loss of signal integrity may manifest as an increase in electromagnetic radiation, which may induce failures in susceptible circuitry of nearby equipment.
One approach to this problem, illustrated in FIG. 1C, is to locate a decoupling capacitor 25 close to the power connections at each device in the processing system, to store charge locally and to supply the transient current demands of the device 20 which cannot be serviced by the remote power supply 10. However, this approach has limitations. Capacitors take up valuable board space, which works against the goal of miniaturization. Furthermore, the stored charge in a capacitor is proportional to voltage (that is, Q=C×V where Q is charge, C is capacitance and V is the system voltage), so as a system operating voltage is reduced, the capacitance (and the area of the capacitors) must be increased to maintain the level of stored charge. As noted above, the reduction of voltage and the increases in frequency tend to increase current demand, so the total capacitance must be increased even more, sacrificing even more board space. As illustrated in FIG. 1D, another way of visualizing the combination of the inductance of a power distribution line and a decoupling capacitor is as a lowpass filter in the frequency domain with a cutoff frequency given approximately by fc=1/(LC)1/2. The power supply system will have difficulty in supplying transient currents with frequencies in the cutoff region above fc, as shown by the cross-hatched region of FIG. 1D. This limitation ultimately defines an operating region where a capacitor network may no longer be effective in supplying energy to an electronic system.